资源列表
baduanshumaguan
- 用VHDL语言设计并实现一电路,其功能是8个数码管分别显示数字0-7。首先是数码管0显示0,其他数码管不显示;然后是数码管1显示1,其他数码管不显示;依此类推,数码管7显示完后再显示数码管0,这样循环下去。(提示:数字0-7的循环可以使用8进制计数器对1Hz的时钟信号进行计数得到,计数器的输出送到BCD到七段数码管的译码器,由其驱动数码管显示相应的数字。)(Using VHDL language to design and implement a circuit, its function is
DDR3
- spartan6 里使用DDR3IP核,有教程以及源码(spartan6 with ddr3,source and tutorial)
CH04-KEA128-Light
- 使小灯亮,并且调节寄存器,使小灯闪烁,以不同的时间间隔(Make the small light on, and adjust the register, make the small light flashing, at different time intervals)
PLX_PlxCm_Dos_v2_90_2017-03-14
- PLX PCIe switches tool for DOS
FPGA_EP4C
- Scematic and Verilog Examples for generic Cyclone iV board.
CIC-filter-master
- Code Verilog CIC Filter FPGA
4 level
- verilog四级触发链 简化代码 可以运行在FPGA平台上(Verilog 4 level flip-flop)
0011.DBCONN
- File list(Click to check if it's the file you need, and recomment it at the bottom):
7232
- Space target recognition algorithm using PM, Maximum Likelihood (ML) criteria and maximum a posteriori (MAP) criterion, ECG data and includes source code written in MATLAB.
led_water
- 酷睿系列流水灯通用程序,来回往返流水,点亮led(ledwater for ep2c8q208c8)
EP4CE10F17C8
- FPGA的手册资料,EP4CE10F17C8的(Manual data of FPGA EP4CE10F17C8)
比较器1
- 实现两个数字的比较大小,包括顶层文件和源文件以及测试文件。(To achieve the size of the two figures.)