资源列表
det44
- calculation of 4-4 matrix deteminant VHDL code
mux_casez
- 用verlog写的复用器，16选1 简单但很实用-Written with verlog multiplexer, 16 selected a simple but very useful
fog_acc
- 都是介绍CAN总线的资料，费了好大劲搞到的，很不错，大家可以分享下-CAN bus data are introduced, and with great enthusiasm got, very good, we can share with
LCD_Driver
- A project in VHDL for LCD - Driver-A project in VHDL for LCD- Driver
sumador
- sumer vhdl code for FPGA of Xilinx
crc
- 用verilog实现串进并出的CRC算法-Achieved with verilog into and out of the CRC series algorithm
ps2
- PS2断码和通码的16进制，供大家学习，共同提高，-PS2 break codes and pass codes 16 hex, for everybody to learn and improve together,
monoestable
- source code to rebote filter in vhdl languaje
adc8051
- 常用的TI8位ADC芯片AD8051的驱动程序，其他近似的驱动芯片也可以参考-Common TI8 bit ADC chip AD8051 driver, the driver of other similar chips can also refer to
jiaotongdeng
- vhdl交通灯程序，根据需要设置黄色信号灯运行的时间，根据需要设置红色及绿色信号灯运行的时间-vhdl traffic light program, according to the need to set the yellow signal run time, according to the need to set the red and green signal lights running time
ripple_carry_adder
- 行波加法器，Verilog语言编写。行波加法器，Verilog语言编写-The line wave adder Verilog language. The line wave adder Verilog language
fsk_two1
- 基于verilog的2fsk解调的程序，调试通过，有需要可以下载来参考-The 2fsk demodulation based verilog program, debugging through, there is a need to download reference